1. Field of the Invention
The present invention relates to a switching regulator and, particularly, to a switching regulator for use in a D.C. power source circuit of an electronic device, which is capable of restricting overshoot of an output voltage of the D.C. power source at a time when the switching regulator is actuated to allow the D.C. power source circuit to generate a desired stabilized power source voltage substantially simultaneously with a turning ON of the power source circuit, while preventing the power source circuit from oscillating.
2. Description of the Prior Art
In jorder to efficiently obtain a stabilized power source voltage of a conventional power source circuit of an electronic device such as a portable audio device, a portable personal computer, a PHS, a portable telephone set or the like, the power source circuit utilizes a switching regulator.
FIG. 3 is a circuit diagram of an example of a conventional switching regulator. In FIG. 3, a switching regulator 10 includes an error amplifier (Err) 11, a reference voltage generator circuit 12, a PWM pulse generator circuit 13, a driver 14, a switching circuit 15 and a voltage dividing resistor circuit 17. The switching circuit 15 is composed of a P channel MOSFET Q1 having an emitter connected to an input power source line +Vcc and a Schottky diode D connected between the P channel MOSFET Q1 and ground GND.
A power capacitor C has one terminal connected to an output terminal 16 of the switching regulator 10 and the other terminal grounded (GND). An inductor L is connected between the output terminal 16 and a junction between the MOSFET Q1 and the Schottky diode D. An inductance of the inductor L is in the order of 10 xcexcH and a capacitance of the capacitor C is about 150 xcexcF. A voltage dividing resistor circuit 17 for detecting a voltage of the output terminal 16 has one terminal connected to the output terminal 16 and the other terminal grounded (GND). A voltage Vs detected by the voltage dividing resistor circuit 17 is fedback to one of input terminals of the error amplifier 11. The voltage Vs detected by the voltage dividing resistor circuit is compared by the error amplifier 11 with a reference voltage Vref applied to the other input terminal of the error amplifier 11 and an error voltage VE between the detected voltage Vs and the reference voltage Vref is inputted to the PWM pulse generator circuit 13 as an error detection signal. The PWM pulse generator circuit 13 is usually constructed with a comparator (COM) 13a and a sawtooth wave generator circuit 13b. In the PWM pulse generator circuit 13, a sawtooth voltage from the sawtooth wave generator circuit 13b is compared with the error voltage VE so that the sawtooth wave is sliced by the error voltage VE to produce a PW pulse having width determined by the error voltage VE. The PMW pulse thus generated is inputted to the driver 14. The driver 14 drives the MOSFET Q1 to turn it ON and OFF for a time period corresponding to the width of the PWM pulse to generate a reduced voltage, or a boosted voltage obtained by fly-back pulse when the switching regulator is of the booster type, which is applied to the output terminal 16 through the inductance L.
Incidentally, the Schottky diode D is a flywheel diode for returning current flowing from the inductance L when the MOSFET Q1 is turned OFF to the inductance L.
With this construction, the MOSFET Q1 is ON-OFF controlled by the driver 14 such that the voltage Vs obtained by the voltage dividing resistor circuit 17 becomes coincident with the reference voltage Vref. Therefore, the output voltage of the MOSFET Q1 at the output terminal 16 is stabilized to a constant voltage Vo.
The voltage dividing resistor 17 for detecting the output voltage of the switching regulator is composed of a resistor R1 connected to the output terminal 16 of the switching regulator, a resistor R2 connected in series with the resistor R1 and a speed-up circuit. The speed-up circuit includes a CR time constant circuit 17a for setting a gain and functions to reduce a time period from a time at which the switching regulator 10 is started to a time at which the operation of the switching regulator enters into a voltage stabilizing mode. The CR time constant circuit 17a is composed of a series circuit of a resistor R3 and a capacitor C1 and is connected in parallel to the resistor R1 of the voltage dividing resistor circuit 17. The CR circuit 17a functions to increase a gain (voltage dividing ratio) of a rising portion of the detection voltage Vs to thereby rise the detection voltage Vs at high speed in an initial operating stage of the switching regulator. As a result, the output voltage is increased to the aimed voltage Vo rapidly.
At this time, an impedance determined by a time constant given by the resistor R3 and the capacitor C1 is connected in parallel to the resistor R1, so that the switching regulator operates at a response speed obtained thereby. Therefore, the time required to obtain the aimed output voltage Vo is shortened.
Incidentally, Lo depicts a load and a capacitance of the capacitor C1 is about 5.6 xcexcF. When the operation of the switching regulator becomes the voltage stabilizing state (normal state), a terminal voltage of the capacitor C1 when charged is substantially maintained at the terminal voltage of the resistor R1. It is usual that the resistor R3 has a value smaller than a half of the value of the resistor R1 and the impedance of the series circuit of the resistor R3 and the capacitor C1 at the starting time of operation of the switching regulator is smaller than the half value of the resistor R1.
However, with the provision of the CR time constant circuit 17a, there is a problem of occurrence of overshoot in a rising portion of the output voltage of the power source. In order to solve the overshoot problem, the time constant of the CR time constant circuit 17a is increased by increasing the capacitance of the capacitor C1, which is generally referred to as the xe2x80x9cspeed-up capacitorxe2x80x9d, to relax a voltage change of the rising portion of the detection voltage Vs. However, when the capacitor C1 having increased capacitance is used, the phase advance is increased with increase of the switching frequency of the switching regulator, so that there is another problem of oscillation of the switching regulator.
In order to solve the circuit oscillation problem, it is usual that the effective width of the output pulse of the PWM pulse generator circuit 13 at the starting time of the switching regulator is increased gradually or an amplifier having a low operating speed is used as the error amplifier 11. In the former case, there is a problem that the size of the control circuit at the starting time of the switching regulator becomes large and, in the latter case, there is a problem that the high response speed to the output voltage regulation is lost.
The present invention was made to solve the above described problems of the conventional technique and an object of the present invention is to provide a switching regulator capable of restricting an overshoot of an output voltage of the switching regulator at a starting time thereof and of generating a predetermined, stabilized power source voltage immediately after a power source is turned ON, while preventing oscillation of the power source circuit.
In order to achieve the above object, a switching regulator according to the present invention, in which a portion or a whole portion of a voltage outputted from an output terminal of a D.C. power source to a load through a voltage divider circuit connected in parallel to the load is fed back to one of inputs of an error amplifier of the switching regulator, a predetermined constant voltage is applied to the other input of the error amplifier, the voltage +Vcc of the D.C. power source is switched by a transistor according to an error detection signal obtained from the error amplifier and a predetermined, stabilized voltage is generated at an output terminal of the power source circuit, is featured by comprising a series circuit of a resistor, a diode and a capacitor (referred to as a xe2x80x9cspeed-up capacitorxe2x80x9d, hereinafter) for shortening a time period from a time at which the power source circuit is turned ON up to a time at which the switching regulator enters into a voltage stabilizing operation is connected in parallel to a voltage dividing resistor circuit provided on the side of the output terminal.
With the provision of the series circuit of the resistor, the diode and the speed-up capacitor connected in parallel to a voltage dividing resistor (R1) of the voltage dividing resistor circuit provided on the side of the output terminal ot the power source circuit, the charging of the speed-up capacitor is started from a time when a terminal voltage of the resistor R1 becomes Vf or more, which is necessary to turn the diode of the series circuit ON. The maximum charging voltage of the speed-up capacitor is a difference between the terminal voltage of the resistor R1 during a time for which the voltage stabilizing operation is performed and Vf, so that the charging of the speed-up capacitor of the series circuit is gradually performed even when a capacitance of the speed-up capacitor is small. Therefore, the voltage dividing ratio of the voltage dividing resistor circuit is gradually changed.
As a result, it becomes possible to restrict the overshoot of the output voltage at the starting time of the operation of the switching regulator without risk of circuit oscillation to thereby start the operation of the switching regulator immediately after the power source is turned ON.